The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Sep. 19, 2023
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventor:

Koying Huang, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/08 (2006.01); G11C 16/16 (2006.01); G11C 16/24 (2006.01); G11C 29/50 (2006.01); G11C 16/28 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/08 (2013.01); G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 29/50 (2013.01); G11C 16/28 (2013.01); G11C 2029/5006 (2013.01);
Abstract

A memory device includes a controller configured for initiating a program operation for a first column of memory cells which belongs to a group of memory cells; setting a verify condition which comprises a leakage current threshold during a leakage current verifying operation; performing, via a leakage current verifying circuit, a leakage current verifying operation for the first column of the memory cells by applying a negative voltage sweep to each of first remaining M−1 unselected WLs of the M WLs until finding a first negative voltage resulting in the first column of the memory cells having passed leakage current threshold; and applying the program operation for the first column of the memory cells by applying the first negative voltage to each of the first remaining M−1 unselected WLs of the M WLs and a positive bit line voltage for the N BLs.


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