The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2025
Filed:
Mar. 24, 2021
Intel Corporation, Santa Clara, CA (US);
Ajay Saini, Hillsboro, OR (US);
Prashant Solanki, Hillsboro, OR (US);
Bharath Prabhu Perdoor, Hillsboro, OR (US);
Yong-Joon Park, Portland, OR (US);
Sravan Akepati, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Examples described herein relate to a display engine. In some examples, at least one processor is to generate one or more planes of a frame and store the generated one or more planes of a frame into the at least one memory. In some examples, the at least one processor is to determine whether a plane in the frame is a candidate plane for compression. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression, the at least one processor is to adjust a plane level of the candidate plane to subject the candidate plane to compression. In some examples, the plane level of the candidate plane to subject the candidate plane to compression is a bottom most level. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression and the candidate plane including content that would be occluded by an upper level plane, the at least one processor is to retain a plane level of the candidate plane. In some examples, for the candidate plane for compression, based on the candidate plane not being subject to compression and the candidate plane including content that would not be occluded by an upper level plane, the at least one processor is to adjust the plane level of the candidate plane to a bottom most level.