The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Jun. 15, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yong-Sheng Huang, Taipei, TW;

Ming Chyi Liu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/30 (2023.01); H01L 21/28 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/792 (2006.01); H10B 41/30 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/30 (2023.02); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H10B 41/30 (2023.02);
Abstract

The present disclosure relates to an integrated chip comprising a substrate having a first pair of opposing sidewalls that define a trench. The trench extends into a front-side surface of the substrate. A first source/drain region is disposed along the front-side surface of the substrate. A second source/drain region is disposed along the front-side surface of the substrate. A gate structure is disposed within the trench and is arranged laterally between the first source/drain region and the second source/drain region. The gate structure fills the trench and extends along the first pair of opposing sidewalls to an upper surface of the substrate. A bottom surface of the gate structure is disposed below a bottom surface of the first source/drain region.


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