The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2025
Filed:
Oct. 19, 2022
Synopsys, Inc., Sunnyvale, CA (US);
Tigran Petrosyan, Yerevan, AM;
Arshavir Matevosyan, Glendale, CA (US);
Davit Vanetsyan, Yerevan, AM;
Davit Petrosyan, Oakville, CA;
Ashot Muradyan, Yerevan, AM;
Synopsys, Inc., Sunnyvale, CA (US);
Abstract
A line driver circuit include a multitude of PMOS and NMOS transistors. A first PMOS transistor receives an output voltage of a first level converter. A second PMOS transistor receives a first reference voltage. A third and fourth PMOS transistors receive an output voltage of a second voltage level converter. The source terminal of the first PMOS transistor receives the supply voltage. The drain terminal of the fourth PMOS transistor is coupled to an output terminal of the line driver circuit. A first NMOS transistor receives an input signal. A second NMOS transistor receives a second reference voltage. A third and fourth NMOS transistors receive an output voltage of a third level converter. The first NMOS transistor receives a ground potential. The drain terminal of the fourth NMOS transistor is coupled to the output terminal of the line driver. The first, second and third voltage converters receive the input signal.