The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Jan. 16, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Zhonglai Liu, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 5/14 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 5/146 (2013.01); G11C 5/147 (2013.01); G11C 7/1084 (2013.01);
Abstract

A bias generation circuit and a memory circuit are provided. The bias generation circuit includes: a first load circuit coupled between a working voltage and an regulating node; a bias circuit configured to receive the working voltage and output a bias voltage according to the working voltage; a voltage stabilizing circuit coupled to an output end of the bias circuit and configured to receive a reference voltage and regulate a voltage of the regulating node according to the bias voltage and the reference voltage; and a second load circuit having one end coupled to the output end of the bias circuit and the other end coupled to the regulating node.


Find Patent Forward Citations

Liu, Zhonglai. (2025). Bias generation circuit and memory circuit (U.S. Patent No. 12217818). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12217818

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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