The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2025
Filed:
Apr. 21, 2022
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;
Yukihiro Nagai, Quanzhou, CN;
Lu-Yung Lin, Quanzhou, CN;
Chia-Wei Wu, Quanzhou, CN;
Tsun-Min Cheng, Quanzhou, CN;
Yu Chun Lin, Quanzhou, CN;
Zheng Guo Zhang, Quanzhou, CN;
Sun-Hung Chen, Quanzhou, CN;
Wu Xiang Li, Quanzhou, CN;
Hsiao-Han Lin, Quanzhou, CN;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;
Abstract
The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.