The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Jul. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bharat S. Pillilli, El Dorado Hills, CA (US);

Johan Van De Groenendaal, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G06F 13/20 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4403 (2013.01); G06F 13/20 (2013.01); G06F 13/4282 (2013.01); G06F 9/4405 (2013.01);
Abstract

Apparatus and methods for booting and using a single CPU socket as a multi-CPU partitioned platform. The single CPU socket includes a plurality of core tiles that a partitioned into a plurality of virtual clusters comprising CPU sub-sockets. Each of the CPU sub-sockets in coupled to an Input-Output (IO) tile having an integrated boot support block and comprising a plurality of IO interfaces including at least one IO interface configured to receive boot signals for booting the sub-sockets and an IO interface to access boot firmware stored in a firmware storage device coupled to the IO interface. The integrated boot support block is configured to facilitate booting of each of the plurality of CPU sub-sockets using a shared set of boot resources coupled to the plurality of IO interfaces.


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