The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2025
Filed:
May. 05, 2023
Micron Technology, Inc., Boise, ID (US);
Lu Tong, Woodlands, SG;
Ashish Ghai, Saratoga, CA (US);
Chai Chuan Yao, Woodlands, SG;
Ekamdeep Singh, San Jose, CA (US);
Lakshmi Kalpana Vakati, San Jose, CA (US);
Sheng Huang Lee, Meridian, ID (US);
Matthew Ivan Warren, Meridian, ID (US);
Dheeraj Srinivasan, San Jose, CA (US);
Jeffrey Ming-Hung Tsai, San Jose, CA (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.