The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2025
Filed:
Aug. 30, 2022
Applicant:
Kepler Computing Inc., San Francisco, CA (US);
Inventors:
Gaurav Thareja, Santa Clara, CA (US);
Sasikanth Manipatruni, Portland, OR (US);
Rajeev Kumar Dokania, Beaverton, OR (US);
Ramamoorthy Ramesh, Moraga, CA (US);
Amrita Mathuriya, Portland, OR (US);
Assignee:
Kepler Computing Inc., San Francisco, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 53/00 (2023.01); G11C 11/22 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H10B 53/00 (2023.02); G11C 11/221 (2013.01); H01L 28/40 (2013.01);
Abstract
The memory bit-cell formed using the ferroelectric capacitor results in a taller and narrower bit-cell compared to traditional memory bit-cells. As such, more bit-cells can be packed in a die resulting in a higher density memory that can operate at lower voltages than traditional memories while providing the much sought after non-volatility behavior. The pillar capacitor includes a plug that assists in fabricating a narrow pillar.