The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Jan. 17, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Beiyou Zhao, Hefei, CN;

Yu Li, Hefei, CN;

Teng Shi, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/12 (2006.01); G11C 29/38 (2006.01); G11C 29/40 (2006.01);
U.S. Cl.
CPC ...
G11C 29/12015 (2013.01); G11C 29/1201 (2013.01); G11C 29/38 (2013.01); G11C 2029/4002 (2013.01);
Abstract

A memory chip test method includes: a mode register write command is sent to a memory chip to control a memory chip to enter a test mode of Write Clock to clock leveling (Wck2ck Leveling); a first preset time is set, and a read and write clock signal is sent to the memory chip after waiting for the first preset time; a predicted value of the Wck2ck Leveling is determined according to the first preset time and a system clock cycle; after sending the read and write clock signal and waiting for a second preset time, a test data output port of the memory chip is detected to obtain a test value; and the test value and the predicted value are compared to determine whether the memory chip is abnormal. A method for testing a Wck2ck Leveling function is provided.


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