The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Aug. 29, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Kenta Shibasaki, Kamakura Kanagawa, JP;

Yoshihiko Shindo, Fujisawa Kanagawa, JP;

Yasuhiro Hirashima, Kawasaki Kanagawa, JP;

Akio Sugahara, Yokohama Kanagawa, JP;

Shigeki Nagasaka, Kawasaki Kanagawa, JP;

Dai Nakamura, Fujisawa Kanagawa, JP;

Yousuke Hagiwara, Kawasaki Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0613 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01);
Abstract

A memory system includes a memory chip and a memory controller. The memory chip includes a storage region that stores setup data used for setup of the memory chip during power on thereof. The memory controller is configured to determine whether or not the memory controller has the setup data, when determining that the memory controller does not have the setup data, instruct the memory chip to read the setup data from the storage region and perform a first setup operation based on the read setup data, and when determining that the memory controller has the setup data, transmit the setup data to the memory chip and instruct the memory chip to perform a second setup operation based on the setup data received from the memory controller.


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