The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2025
Filed:
Dec. 22, 2021
Intel Corporation, Santa Clara, CA (US);
Ren Wang, Portland, OR (US);
Sameh Gobriel, Dublin, CA (US);
Somnath Paul, Hillsboro, OR (US);
Yipeng Wang, Portland, OR (US);
Priya Autee, Chandler, AZ (US);
Abhirupa Layek, Chandler, AZ (US);
Shaman Narayana, Chandler, AZ (US);
Edwin Verplanke, Queen Creek, AZ (US);
Mrittika Ganguli, Chandler, AZ (US);
Jr-Shian Tsai, Portland, OR (US);
Anton Sorokin, Portland, OR (US);
Suvadeep Banerjee, San Jose, CA (US);
Abhijit Davare, Hillsboro, OR (US);
Desmond Kirkpatrick, Portland, OR (US);
Rajesh M. Sankaran, Portland, OR (US);
Jaykant B. Timbadiya, Amreli Gujrat, IN;
Sriram Kabisthalam Muthukumar, Bengaluru, IN;
Narayan Ranganathan, Bangalore, IN;
Nalini Murari, Hillsboro, OR (US);
Brinda Ganesh, Portland, OR (US);
Nilesh Jain, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.