The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Jun. 25, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Harel Frish, Albuquerque, NM (US);

John Heck, Berkeley, CA (US);

Randal Appleton, Albuquerque, NM (US);

Stefan Meister, Portland, OR (US);

Haisheng Rong, Pleasanton, CA (US);

Joshua Keener, Albuquerque, NM (US);

Michael Favaro, Edgewood, NM (US);

Wesley Harrison, Portland, OR (US);

Hari Mahalingam, San Jose, CA (US);

Sergei Sochava, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/122 (2006.01); H01S 5/026 (2006.01);
U.S. Cl.
CPC ...
G02B 6/12019 (2013.01); G02B 6/1225 (2013.01); H01S 5/026 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/1213 (2013.01); G02B 2006/12164 (2013.01);
Abstract

Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.


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