The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Aug. 25, 2021
Applicant:

Changxin Memory Technologies, Inc., Anhui, CN;

Inventors:

Jingwen Lu, Hefei, CN;

Hai-Han Hung, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H10B 12/312 (2023.02); H01L 29/0649 (2013.01); H10B 12/482 (2023.02);
Abstract

A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a substrate, bit line structures and isolation walls located on side walls of the bit line structures, and capacitor contact holes. In the substrate, conductive contact regions are arranged. The conductive contact regions are exposed from the substrate. A plurality of discrete bit line structures are located on the substrate. Each of the isolation walls includes at least one isolation layer and a gap between the isolation layer and the bit line structure. Each of the capacitor contact holes is constituted by a region surrounded by the isolation walls between the adjacent bit line structures. The capacitor contact holes expose the conductive contact regions. A top width of the capacitor contact holes is larger than a bottom width thereof in a direction parallel to an arrangement direction of the bit line structures.


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