The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Feb. 21, 2023
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Shao-Ching Liao, Taichung, TW;

Chien-Min Wu, Taichung, TW;

Kuang-Chih Hsieh, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50 (2013.01); G11C 2029/5004 (2013.01);
Abstract

A semiconductor memory apparatus and a testing method thereof are provided. The semiconductor memory apparatus includes a memory chip and a memory controller. The memory controller is configured to detect an initial test voltage of a target memory cell corresponding to a tailing bit in a main array of the memory chip. After the memory chip is idle for a first time, the memory controller detects a first test voltage of the target memory cell and compares it with a current comparison voltage to determine whether a first stage test is passed. In a case of passing the first stage test, after the memory chip is idle for a second time, the memory controller detects a second test voltage of the target memory cell and compares it with the current comparison voltage to determine whether a second stage test is passed. The comparison voltage is dynamically updated in response to the time the memory chip is idle.


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