The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Sep. 12, 2022
Applicant:
Arteris, Inc., Campbell, CA (US);
Inventor:
Benoit de Lescure, Campbell, CA (US);
Assignee:
ARTERIS, INC., Campbell, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 41/12 (2022.01); H04L 41/06 (2022.01); H04L 41/22 (2022.01); H04L 49/109 (2022.01);
U.S. Cl.
CPC ...
H04L 41/12 (2013.01); H04L 41/06 (2013.01); H04L 41/22 (2013.01); H04L 49/109 (2013.01);
Abstract
A system and method implemented by tool is disclosed. The tool receives input of a network-on-chip (NoC) and the NoC's desired connectivity and efficiently guides the designer through interactive NoC topology editing sessions to ensure the obtained network is both complete and correct during topology creation or modification.
Quick Actions:
de Lescure, Benoit. (2024). System and method for editing a network-on-chip (noc) (U.S. Patent No. 12184499). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12184499
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile