The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Jun. 24, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventor:

Michael Clinton, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 5/14 (2006.01); G11C 7/08 (2006.01); G11C 7/12 (2006.01); G11C 8/08 (2006.01); G11C 11/419 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
G11C 7/227 (2013.01); G11C 5/145 (2013.01); G11C 7/08 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01); G11C 11/419 (2013.01); H10B 10/00 (2023.02);
Abstract

Systems, devices, and methods are provided for enabling turbo mode for static random access memory (SRAM) devices. A cell circuit is coupled between a bit line pair and configured to perform read or write operations of a memory device. A sense amplifier circuit is coupled between the bit line pair and configured to sense a voltage differential between the bit line pair. A tracking circuit includes a tracking bit line (DBL) and is configured to monitor operation of the cell circuit and send a sense amplifier enable signal to the sense amplifier at a predetermined frequency rate based on a voltage level of the DBL. A turbo circuit is coupled to a turbo signal and configured to modify the voltage of the tracking bit line enabling sending of the sense amplifier enable signal at a rate faster than the predetermined frequency rate.


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