The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Dec. 04, 2018
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Mitchell G. Poplack, San Jose, CA (US);

Christopher Coffman, San Jose, CA (US);

Hitesh Gannu, San Jose, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 9/455 (2018.01); G06F 30/331 (2020.01); G06F 30/3323 (2020.01); G06F 30/398 (2020.01); G06F 115/02 (2020.01); G06F 117/08 (2020.01);
U.S. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 30/331 (2020.01); G06F 30/398 (2020.01); G06F 9/455 (2013.01); G06F 30/3323 (2020.01); G06F 2115/02 (2020.01); G06F 2117/08 (2020.01);
Abstract

A shared memory is provided between simulation processors and emulation processors within an emulation chip. The shared memory is configured to enable the simulation processors and the emulation processors to exchange simulation data and emulation data respectively with each other during simulation and emulation operations. The simulation processors and the emulation processors may update their respective simulation and emulation operations in response to the simulation data and the emulation data exchanged via the shared memory.


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