The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Mar. 31, 2022
Applicant:

Diodes Incorporated, Milpitas, CA (US);

Inventors:

Yu-Wei Lin, New Taipei, TW;

Nanyuan Chen, Taipei, TW;

Assignee:

Diodes Incorporated, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/03 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318552 (2013.01); G01R 31/31727 (2013.01); H04L 25/03267 (2013.01);
Abstract

Methods and systems for performing data correction and phase optimization are disclosed herein. In some implementations, a system for performing data correction comprises: an analog to digital converter (ADC) configured to receive differential data from a continuous time linear equalizer (CTLE) and generate a bitstream comprising a plurality of data bits and a corresponding plurality of data sign bits; a decision feedback equalization (DFE) block configured to receive the bitstream from the ADC and provide data to a clock and data recovery (CDR) block; and data correction circuitry. In some implementations, the data correction circuitry is configured to: receive the bitstream from the ADC; determine whether to correct a data sign bit; responsive to determining the data sign bit is to be corrected, flip the data sign bit; and provide the plurality of data sign bits, including the flipped data sign bits, to the DFE.


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