The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 2024
Filed:
May. 20, 2020
Sumitomo Electric Industries, Ltd., Osaka, JP;
Sumitomo Electric Printed Circuits, Inc., Koka, JP;
Shoichiro Sakai, Osaka, JP;
Junichi Motomura, Osaka, JP;
Koji Nitta, Osaka, JP;
Masashi Iwamoto, Koka, JP;
Mitsutaka Tsubokura, Osaka, JP;
Mari Sogabe, Osaka, JP;
Akira Tsuchiko, Osaka, JP;
SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka, JP;
SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., Koka, JP;
Abstract
A printed wiring board includes a base layer having insulating properties, a first conductive layer directly or indirectly stacked on the base layer front surface, and including a copper foil, a second conductive layer directly or indirectly stacked on the base layer back surface, and including a copper foil, a stacked body for a via hole, the stacked body being stacked on an inner periphery and a bottom of a connection hole that extends through the first conductive layer and the base layer in a thickness direction, and being configured to electrically connect the first conductive layer and the second conductive layer to each other, and having an electroless copper plating layer. Each copper foil contains a copper crystal grain oriented in a plane orientation, and an average crystal grain size of copper of each copper foil is 10 μm or greater, the electroless copper plating layer includes palladium.