The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2024

Filed:

Mar. 23, 2022
Applicant:

Ap Memory Technology Corporation, Hsinchu County, TW;

Inventors:

Wenliang Chen, Hsinchu County, TW;

Chien An Yu, Hsinchu County, TW;

Assignee:

AP MEMORY TECHNOLOGY CORPORATION, Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 24/80 (2013.01); H01L 21/481 (2013.01); H01L 22/14 (2013.01); H01L 24/08 (2013.01); H01L 24/09 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/09515 (2013.01); H01L 2224/80001 (2013.01); H01L 2924/1436 (2013.01);
Abstract

A method for bonding tested wafers is provided. The method includes the following operations. A first wafer having a first surface is received, and the first wafer includes a test pad and a conductive pad at the first surface of the first wafer and the test pad has a recess caused by a test probe and the conductive pad is electrically connected to the test pad. The first surface of the first wafer is planarized. A first hybrid bonding layer is formed over the first surface of the first wafer. The first wafer and a second wafer are bonded to connect the first hybrid bonding layer and a second hybrid bonding layer on the second water. A semiconductor structure and a method for testing pre-bonded wafers are also provided.


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