The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Mar. 08, 2022
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Shih-Chieh Lin, Chiayi County, TW;

Shuen-Hsiang Ke, Changhua County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 29/40 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02); H10B 12/50 (2023.02);
Abstract

A memory structure includes: a substrate including a memory array region and a peripheral circuit region; a plurality of bit line structures disposed in the memory array region of the substrate; a dummy bit line structure disposed on the substrate, wherein the dummy bit line structure is disposed in the memory array region and immediately adjacent to the peripheral circuit region; a plurality of contacts disposed between the bit line structures and in the memory array region; a dielectric layer disposed on the substrate and in the peripheral circuit region; and a protective structure disposed in the memory array region and immediately adjacent to the peripheral circuit region, wherein the protective structure includes the dummy bit line structure and a top surface of the protective structure is higher than top surfaces of the bit line structures.


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Lin, Shih-Chieh. (2024). Memory structure (U.S. Patent No. 12171095). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12171095

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