Techniques for initializing memory error correction

Abstract

Methods, systems, and devices for techniques for initializing memory error correction are described. A memory system may perform operations relating to writing data to multiple memory cells belonging to one or more rows of the memory system in response to a single write command. For example, the memory system may receive (e.g., from a host system) an activation command (e.g., a row group activation command) indicating a row group address. The memory system may activate a set of rows indicated by the row group address. In response to a write command (e.g., a row group write command), the memory system may write data in a respective memory cell of each row indicated by the row group address. For example, each memory cell to be written may correspond to a column address included in the write command. The memory system may write a same logic state to each memory cell.