The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Sep. 27, 2022
Applicant:
Arteris, Inc., Campbell, CA (US);
Inventor:
Kurt Michael Shuler, Sunnyvale, CA (US);
Assignee:
ARTERIS, INC., Campbell, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/173 (2006.01); G06F 9/48 (2006.01); G06F 15/78 (2006.01); H04L 41/147 (2022.01); H04L 43/028 (2022.01); H04L 43/062 (2022.01);
U.S. Cl.
CPC ...
H04L 41/147 (2013.01); G06F 9/4881 (2013.01); G06F 15/7825 (2013.01); H04L 43/028 (2013.01); H04L 43/062 (2013.01);
Abstract
A network-on-chip (NoC) provides packet-based communication between a plurality of initiator computing elements and a plurality of target computing elements. The NoC includes a plurality of observer processors upstream of and corresponding to the target computing elements. Each observer processor is configured to perform packet inspection and generate information in real-time about traffic load on its corresponding target computing element. An aggregator processor is configured to process the traffic load information from the observer processors to identify those target computing elements that are most heavily contended.