The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

Jan. 27, 2021
Applicant:

Innoscience (Suzhou) Semiconductor Co., Ltd., Suzhou, CN;

Inventors:

Jingyu Shen, Suzhou, CN;

Qiyue Zhao, Suzhou, CN;

Chunhua Zhou, Suzhou, CN;

Chao Yang, Suzhou, CN;

Wuhao Gao, Suzhou, CN;

Yu Shi, Suzhou, CN;

Baoli Wei, Suzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 25/11 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 25/117 (2013.01); H01L 25/50 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01); H01L 24/16 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16235 (2013.01);
Abstract

Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a gate electrode, a first electrode, a first via and a second via. The substrate has a first surface and a second surface. The first nitride semiconductor layer is disposed on the first surface of the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap exceeding that of the first nitride semiconductor layer. The gate electrode and the first electrode are disposed on the second nitride semiconductor layer. The first via extends from the second surface and is electrically connected to the first electrode. The second via extends from the second surface. The depth of the first via is different from the depth of the second via.


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