Trench field effect transistor structure comprising epitaxial layer and manufacturing method thereof

Abstract

The present disclosure provides a trench field effect transistor structure and a manufacturing method thereof. The manufacturing method includes: providing a substrate (), forming an epitaxial layer (), forming a device trench () in the epitaxial layer, and forming a shielding dielectric layer (), a shielding gate layer (), a first isolation dielectric layer (), a gate dielectric layer (), a gate layer (), a second isolation dielectric layer (), a body region (), a source (), a source contact hole (), a source electrode structure (), and a drain electrode structure (). During manufacturing of a trench field effect transistor structure, a self-alignment process is adopted in a manufacturing process, so that a cell pitch is not limited by an exposure capability and alignment accuracy of a lithography machine, to further reduce the cell pitch of the device, improve a cell density, and reduce a device channel resistance.