The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Dec. 09, 2021
Applicant:
Synopsys, Inc., Sunnyvale, CA (US);
Inventor:
Adam Cron, Hilton Head, SC (US);
Assignee:
Synopsys, Inc., Sunnyvale, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/14 (2013.01); G06F 21/10 (2013.01); G06F 21/31 (2013.01); G06F 30/3308 (2020.01);
U.S. Cl.
CPC ...
G06F 21/14 (2013.01); G06F 21/31 (2013.01); G06F 30/3308 (2020.01); G06F 21/1064 (2023.08);
Abstract
A method of obfuscating a circuit design includes, in part, receiving data representative of the circuit design. The method further includes, in part, simulating the circuit design, and obfuscating at least one output signal of the circuit design if a user performing the simulation is determined as not being an authorized user.
Quick Actions:
Cron, Adam. (2024). Obfuscating encrypted register transfer logic model of a circuit (U.S. Patent No. 12164608). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12164608
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile