The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

Nov. 01, 2022
Applicant:

Arteris, Inc., Campbell, CA (US);

Inventors:

Michael Frank, Sunnyvale, CA (US);

Mohammed Khaleeluddin, Union City, CA (US);

Assignee:

ARTERIS, INC., Campbell, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0828 (2013.01); G06F 2212/621 (2013.01);
Abstract

A cache coherent interconnect connected to one or more agents, such as CPUs, GPUs, Peripherals, etc. using network interface units (NIUs), and having one or more internal modules, such as a directory, is provided with one or more event-to-message converters, and one or more message-to-event converters. When a particular event occurs within one of the agents or modules, a message is initiated and transmitted using the existing interconnect wiring to one or more agents or modules, which have associated NIUs, that need to be aware of the event. Response messages showing the status of the event-message may also be generated. Therefore, messages are sent when events occur, instead of constantly using bandwidth for status updates when no status is changing, making the interconnect more efficient and freeing up bandwidth. These converters are provided as additional hardware blocks incorporated into the various NIUs and modules.


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