The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Apr. 16, 2021
Applicant:

Pure Storage, Inc., Mountain View, CA (US);

Inventors:

Hari Kannan, Sunnyvale, CA (US);

Gordon James Coleman, Los Altos, CA (US);

Douglas Lother, Mountain View, CA (US);

Zhan Chen, Santa Clara, CA (US);

Assignee:

PURE STORAGE, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/14 (2006.01); G06F 11/10 (2006.01); G06F 11/16 (2006.01); G06F 12/1009 (2016.01); G11C 29/00 (2006.01); G11C 29/36 (2006.01); G11C 29/38 (2006.01); G11C 29/44 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1423 (2013.01); G06F 11/108 (2013.01); G06F 11/142 (2013.01); G06F 11/1666 (2013.01); G06F 12/1009 (2013.01); G11C 29/00 (2013.01); G11C 29/50 (2013.01); G11C 29/76 (2013.01); G11C 29/765 (2013.01); G06F 11/1004 (2013.01); G06F 11/1068 (2013.01); G06F 2201/805 (2013.01); G06F 2212/1032 (2013.01); G06F 2212/202 (2013.01); G06F 2212/466 (2013.01); G06F 2212/7206 (2013.01); G11C 29/36 (2013.01); G11C 29/38 (2013.01); G11C 29/44 (2013.01);
Abstract

A system and related method operate solid-states storage memory. The system performs a first tuning process that has a first set of tuning options, on a first portion of solid-states storage memory. The system identifies one or more second portions of solid-states storage memory, within the first portion of solid-states storage memory that fail readability after the first tuning process. The system performs a second tuning process that has a differing second set of tuning options, on each of the one or more second portions of solid-states storage memory.


Find Patent Forward Citations

Loading…