The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Apr. 13, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Jui-Chun Weng, Taipei, TW;

Lavanya Sanagavarapu, Hsin-Chu, TW;

Ching-Hsiang Hu, Taipei, TW;

Wei-Ding Wu, Zhubei, TW;

Shyh-Wei Cheng, Hinchu County, TW;

Ji-Hong Chiang, Changhua, TW;

Hsin-Yu Chen, Hsinchu, TW;

Hsi-Cheng Hsu, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 3/00 (2006.01); B81C 1/00 (2006.01); H01J 37/34 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
B81C 1/0092 (2013.01); B81B 3/0005 (2013.01); B81C 1/00349 (2013.01); B81C 1/00357 (2013.01); B81C 1/00373 (2013.01); B81C 1/00682 (2013.01); B81C 1/00912 (2013.01); B81C 1/00928 (2013.01); B81C 1/0096 (2013.01); B81C 1/00992 (2013.01); H01J 37/3405 (2013.01); H01J 37/3414 (2013.01); H01J 37/3461 (2013.01); H01J 37/347 (2013.01); H01L 21/02499 (2013.01); H01L 21/02518 (2013.01); B81B 2201/0235 (2013.01); B81B 2201/0242 (2013.01); B81B 2201/025 (2013.01); B81B 2207/012 (2013.01); B81C 2201/0133 (2013.01); B81C 2201/112 (2013.01); B81C 2203/0118 (2013.01); B81C 2203/035 (2013.01);
Abstract

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.


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