The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Feb. 09, 2022
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Subramanian Ganesan, Cupertino, CA (US);

Ramesh Narayanaswamy, Palo Alto, CA (US);

Dinesh Madusanke Pasikku Hannadige, Dodanduwa, LK;

Chanaka Ranathunga, Kuliyapitiya, LK;

Aditha Pabasara Rajakaruna, Veyangoda, LK;

Subha Sankar Chowdhury, Bangalore, IN;

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/331 (2020.01);
U.S. Cl.
CPC ...
G06F 30/331 (2020.01);
Abstract

This disclosure describes an apparatus and method for simulating circuit designs. An apparatus for simulating circuit designs includes a first simulation vector processor (SVP) and a second SVP communicatively coupled to the first SVP. The first SVP simulates a first portion of a circuit design under test. The second SVP simulates the first portion of the circuit design under test at least partially while the first SVP simulates the first portion of the circuit design and asynchronously with the first SVP and transmits data to the first SVP while simulating the first portion of the circuit design, wherein the first SVP uses the data while simulating the first portion of the circuit design.


Find Patent Forward Citations

Loading…