The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2024
Filed:
Nov. 02, 2023
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Jia-Rong Wu, Kaohsiung, TW;
I-Fan Chang, Tainan, TW;
Rai-Min Huang, Taipei, TW;
Ya-Huei Tsai, Tainan, TW;
Yu-Ping Wang, Hsinchu, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); G11C 11/16 (2006.01); H01F 10/32 (2006.01); H01F 41/34 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01); H10N 50/85 (2023.01);
U.S. Cl.
CPC ...
H10B 61/00 (2023.02); G11C 11/161 (2013.01); H01F 10/3254 (2013.01); H01F 41/34 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H10N 50/01 (2023.02); H10N 50/80 (2023.02); H10N 50/85 (2023.02);
Abstract
A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.