The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Dec. 08, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Zhongming Liu, Hefei, CN;

Shijie Bai, Hefei, CN;

Longyang Chen, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H10B 12/315 (2023.02);
Abstract

A method for manufacturing a semiconductor structure includes: providing a base, in which a plurality of bit lines extending in a first direction and a groove located between two adjacent ones of the bit lines are provided on the base; forming an initial contact layer and an initial protection layer filling the groove, in which the initial contact layer is in contact with the base, the initial protection layer is located on the initial contact layer; patterning the initial contact layer and the initial protection layer to form contact layers that are discrete from each other and protection layers that are discrete from each other; and forming a dielectric layer between two adjacent ones of the contact layers, in which the dielectric layer is further located between two adjacent ones of the protection layers, a material of the dielectric layer is different from a material of the protection layer.


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