The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Jun. 30, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Wan-Yi Kao, Baoshan Township, TW;

Chung-Chi Ko, Nantou, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/02 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/02126 (2013.01); H01L 21/0228 (2013.01); H01L 21/02337 (2013.01); H01L 21/02343 (2013.01); H01L 27/0886 (2013.01); H01L 21/0217 (2013.01);
Abstract

An integrated circuit structure includes a bulk semiconductor region, a first semiconductor strip over and connected to the bulk semiconductor region, and a dielectric layer including silicon oxide therein. Carbon atoms are doped in the silicon oxide. The dielectric layer includes a horizontal portion over and contacting a top surface of the bulk semiconductor region, and a vertical portion connected to an end of the horizontal portion. The vertical portion contacts a sidewall of a lower portion of the first semiconductor strip. A top portion of the first semiconductor strip protrudes higher than a top surface of the vertical portion to form a semiconductor fin. The horizontal portion and the vertical portion have a same thickness. A gate stack extends on a sidewall and a top surface of the semiconductor fin.


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