Reconfigurable computational memory device, operation method of the reconfigurable computational memory device and semiconductor die including the reconfigurable computational memory device

Abstract

A memory device, an operation method of a memory cell in a memory device and a semiconductor die are provided. A computational memory cell in the memory device includes: a field effect transistor (FET), with a changeable threshold voltage; and resistive storage devices, connected by a common terminal coupled to a source/drain terminal of the FET. By altering the threshold voltage of the FET, a logic function of the computational memory cell can be changed. During a logic operation, inputs are provided to the computational memory cell as resistance states of the resistive storage devices, and a current passing through a conduction channel of the FET is functioned as an output for the logic operation.