The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2024
Filed:
Apr. 25, 2023
Applicant:
Rambus Inc., San Jose, CA (US);
Inventors:
Evan Lawrence Erickson, Chapel Hill, NC (US);
Christopher Haywood, Cary, NC (US);
Mark D. Kellam, Siler City, NC (US);
Assignee:
Rambus Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/0804 (2016.01); G06F 12/0882 (2016.01); G06F 12/1009 (2016.01); G06F 12/123 (2016.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1009 (2013.01); G06F 12/0804 (2013.01); G06F 12/0882 (2013.01); G06F 12/123 (2013.01); G06F 13/1668 (2013.01); G06F 2212/7201 (2013.01);
Abstract
Memory pages are background-relocated from a low-latency local operating memory of a server computer to a higher-latency memory installation that enables high-resolution access monitoring and thus access-demand differentiation among the relocated memory pages. Higher access-demand memory pages are background-restored to the low-latency operating memory, while lower access-demand pages are maintained in the higher latency memory installation and yet-lower access-demand pages are optionally moved to yet higher-latency memory installation.