The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Dec. 23, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Martin Clara, Santa Clara, CA (US);

Giacomo Cascio, Villach, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/19 (2006.01); H03F 3/193 (2006.01); H03F 3/24 (2006.01); H03F 3/50 (2006.01);
U.S. Cl.
CPC ...
H03F 3/19 (2013.01); H03F 3/193 (2013.01); H03F 3/245 (2013.01); H03F 3/505 (2013.01); H03F 2200/102 (2013.01); H03F 2200/451 (2013.01); H03F 2203/5003 (2013.01);
Abstract

A signal envelope detector is provided. The signal envelope detector includes an input node configured to receive an input signal. Further, the signal envelope detector includes a capacitive voltage divider coupled to the input node and configured to generate an attenuated input signal by voltage division of the input signal. The signal envelope detector additionally includes a source follower transistor coupled between a first node configured to receive a first voltage supply signal and a second node configured to receive a second voltage supply signal. A gate terminal of the source follower transistor is coupled to the capacitive voltage divider and configured to receive the attenuated input signal. The signal envelope detector includes a rectifier circuit configured to receive and rectify an output signal of the source follower transistor. In addition, the signal envelope detector includes a low-pass filter coupled to the rectifier circuit and configured to generate an envelope signal indicative of a rectified envelope of the input signal by low-pass filtering of an output signal of the rectifier circuit.


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