The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Sep. 08, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Khokan Chandra Paul, Cupertino, CA (US);

Adam J. Fischbach, Campbell, CA (US);

Tsutomu Tanaka, Santa Clara, CA (US);

Canfeng Lai, Fremont, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 37/32 (2006.01); C23C 16/24 (2006.01); C23C 16/509 (2006.01); H01L 21/3205 (2006.01); H01L 21/3213 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01J 37/32174 (2013.01); C23C 16/24 (2013.01); C23C 16/509 (2013.01); H01J 37/32697 (2013.01); H01L 21/32055 (2013.01); H01L 21/32137 (2013.01); H01L 21/32138 (2013.01); H01L 29/66545 (2013.01);
Abstract

Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The processing region may be defined between a faceplate and a substrate support on which the semiconductor substrate is seated. The methods may include forming a treatment plasma within the processing region of the semiconductor processing chamber. The treatment plasma may be formed at a first power level from a first power source. A second power may be applied to the substrate support from a second power source at a second power level. The methods may include densifying the flowable film within the feature defined within the semiconductor substrate with plasma effluents of the treatment plasma.


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