The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2024
Filed:
Sep. 14, 2023
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Eriko Nurvitadhi, Hillsboro, OR (US);
Balaji Vembu, Folsom, CA (US);
Tsung-Han Lin, Campbell, CA (US);
Kamal Sinha, Rancho Cordova, CA (US);
Rajkishore Barik, Santa Clara, CA (US);
Nicolas C. Galoppo Von Borries, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01); G06F 12/0811 (2016.01); G06F 12/0815 (2016.01); G06F 12/0831 (2016.01); G06F 12/0888 (2016.01); G06F 17/16 (2006.01); G06F 18/2136 (2023.01); G06N 3/04 (2023.01); G06N 3/08 (2023.01); G06N 20/00 (2019.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); G06T 15/00 (2011.01); H03M 7/30 (2006.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06F 9/3001 (2013.01); G06F 9/3885 (2013.01); G06F 9/4881 (2013.01); G06F 12/0207 (2013.01); G06F 12/0811 (2013.01); G06F 12/0815 (2013.01); G06F 12/0831 (2013.01); G06F 12/0888 (2013.01); G06F 17/16 (2013.01); G06F 18/2136 (2023.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06N 20/00 (2019.01); G06T 1/60 (2013.01); G06T 15/005 (2013.01); H03M 7/30 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/302 (2013.01); G06F 2212/401 (2013.01); G06F 2212/621 (2013.01); G06T 2200/28 (2013.01);
Abstract
Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.