The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Sep. 30, 2021
Applicant:

Shanghai Huali Integrated Circuit Corporation, Shanghai, CN;

Inventor:

Yong Li, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H01L 21/308 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26513 (2013.01); H01L 21/3086 (2013.01);
Abstract

A method for forming a FinFET super well, forming a deep well and a well region in a silicon substrate, followed by formation the fin structure under a hard mask layer; etching a first portion of a fin, performing the first ion implantation for adjusting the threshold voltage at a first height of the fin, the hard mask layer protects the fin structures from ion implantation damages to the fin top; etching a second portion of the fin, performing the second anti-punch through ion implantation at the second height, and in annealing, the implanted ions laterally diffuse into the fin. Finally, the deep well, the well region, the first ion implantation layer for adjusting the threshold voltage, and the second ion implantation layer for anti-punch through jointly form the FinFET super well, which increases the carrier mobility, thereby improving the device performance.


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