The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Jan. 30, 2023
Applicant:

Infineon Technologies Llc, San Jose, CA (US);

Inventors:

Yoav Yogev, Mazkeret-Batya, IL;

Amichai Givant, Rosh-Ha'ain, IL;

Amir Rochman, Tel-Aviv, IL;

Shivananda Shetty, Fremont, CA (US);

Pawan Singh, Cupertino, CA (US);

Yair Sofer, Tel-Aviv, IL;

Assignee:

Infineon Technologies LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0653 (2013.01); G06F 3/0604 (2013.01); G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01);
Abstract

Systems, methods, and devices implement counters with fault tolerance and power loss protection. Systems include a non-volatile memory device that includes a first counter configured to store a first plurality of data values representing a plurality of count operations, and a second counter configured to store a second plurality of data values representing an initiation and a completion of each erase operation performed on the first counter. Systems also include control circuitry configured to generate a count value based on a current counter value of the first counter, a current counter value of the second counter, and at least one physical parameter of the first counter.


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