The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Sep. 07, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Suresh Rajgopal, San Diego, CA (US);

Chulbum Kim, San Jose, CA (US);

Dustin J. Carter, Placerville, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 12/10 (2016.01); G06F 13/42 (2006.01); G11C 16/04 (2006.01); H03M 9/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1668 (2013.01); G06F 12/10 (2013.01); G06F 13/4234 (2013.01); G06F 13/4282 (2013.01); G11C 16/0483 (2013.01); H03M 9/00 (2013.01);
Abstract

An input/output (I/O) command referencing a logical address of a memory sub-system is received by an active input/output expander (AIOE). The I/O command is received from a memory sub-system controller via the AIOE. The AIOE identifies a physical block address corresponding to the logical block address. The AIOE identifies, among a plurality of memory devices, a memory device associated with the physical block address. The AIOE converts the I/O command received via the serial interface to a parallel interface compliant I/O command. The AIOE sends the parallel interface compliant I/O command to the memory device.


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