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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12125892 B1

PDFFull Text
Date of Patent:
Oct. 22, 2024

Filed:

Feb. 25, 2022

Transistors with reduced defect and methods of forming same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shahaji B. More, Hsinchu, TW;

Chandrashekhar Prakash Savant, Hsinchu, TW;

Tien-Wei Yu, Kaohsiung, TW;

Chia-Ming Tsai, Zhubei, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Brian Turner

Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01); H01L 29/161 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/513 (2013.01); H01L 21/28088 (2013.01); H01L 21/28185 (2013.01); H01L 29/1054 (2013.01); H01L 29/161 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01);
Abstract

A device includes a semiconductor region, an interfacial layer over the semiconductor region, the interfacial layer including a semiconductor oxide, a high-k dielectric layer over the interfacial layer, and an intermixing layer over the high-k dielectric layer. The intermixing layer includes oxygen, a metal in the high-k dielectric layer, and an additional metal. A work-function layer is over the intermixing layer. A filling-metal region is over the work-function layer.

Find Patent Forward Citations

More, Shahaji. (2024). Transistors with reduced defect and methods of forming same (U.S. Patent No. 12125892). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12125892

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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