The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Mar. 09, 2022
Applicant:

Xepic Corporation Limited, Nanjing, CN;

Inventor:

Jiahua Zhu, Hopkinton, MA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 30/337 (2020.01); G06F 30/34 (2020.01); G06F 30/367 (2020.01); G06F 30/398 (2020.01);
U.S. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 30/337 (2020.01); G06F 30/34 (2020.01); G06F 30/367 (2020.01); G06F 30/398 (2020.01);
Abstract

A method of compiling a verification system including a logic system design and a test bench for verifying the logic system design includes: receiving a description of the verification system, parsing the description of the verification system using a first parser and a second parser to generate a first intermediate representation (IR) and a second IR, respectively; analyzing the first and second IRs to generate exchange information; optimizing at least one of the first IR or the second IR based on the exchange information; and generating a first implementable code and a second implementable code respectively based on the first and second IRs after the optimization, wherein the first and second IRs are related by a connection point, and the exchange information is associated with the connection point.


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