The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2024

Filed:

Mar. 07, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Francesc Guim Bernat, Barcelona, ES;

Ned Smith, Beaverton, OR (US);

Thomas Willhalm, Sandhausen, DE;

Karthik Kumar, Chandler, AZ (US);

Timothy Verrall, Pleasant Hill, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 67/1008 (2022.01); H04L 67/00 (2022.01); H04L 67/10 (2022.01); H04L 67/1021 (2022.01); H04L 67/59 (2022.01); H04L 67/61 (2022.01); H04L 67/63 (2022.01);
U.S. Cl.
CPC ...
H04L 67/1008 (2013.01); H04L 67/10 (2013.01); H04L 67/1021 (2013.01); H04L 67/34 (2013.01); H04L 67/59 (2022.05); H04L 67/61 (2022.05); H04L 67/63 (2022.05);
Abstract

Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.


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