The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2024

Filed:

Dec. 26, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Anant Nori, Bangalore, IN;

Shankar Balachandran, Bangalore, IN;

Sreenivas Subramoney, Bangalore, IN;

Joydeep Rakshit, Bengaluru, IN;

Vedvyas Shanbhogue, Austin, TX (US);

Avishaii Abuhatzera, Amir, IL;

Belliappa Kuttanna, Austin, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 9/30065 (2013.01); G06F 9/3836 (2013.01); G06F 9/4881 (2013.01);
Abstract

Techniques for processing loops are described. An exemplary apparatus at least includes decoder circuitry to decode a single instruction, the single instruction to include a field for an opcode, the opcode to indicate execution circuitry is to perform an operation to configure execution of one or more loops, wherein the one or more loops are to include a plurality of configuration instructions and instructions that are to use metadata generated by ones of the plurality of configuration instructions; and execution circuitry to perform the operation as indicated by the opcode.


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