The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Jun. 20, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Yexiao Yu, Hefei, CN;

Longyang Chen, Hefei, CN;

Zhongming Liu, Hefei, CN;

Zhong Kong, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/482 (2023.02);
Abstract

A method includes the following operations for preparing a semiconductor structure, a semiconductor, and a semiconductor memory. A first dielectric layer and a first barrier layer are deposited on a substrate including an active area in sequence. A first mask including a first etching pattern is formed on the first barrier layer, and includes a groove extending in a first direction and uniformly distributed etching holes. Herein, the groove penetrates through the etching hole, and the depth of the etching hole is larger than that of the groove. Etching is performed along the first etching pattern, to remove the first barrier layer and etch the first dielectric layer to form a conductive channel.


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