The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Jul. 03, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Jialiang Deng, Wuhan, CN;

Zhuqin Duan, Wuhan, CN;

Lei Shi, Wuhan, CN;

Yuesong Pan, Wuhan, CN;

Yanlan Liu, Wuhan, CN;

Bo Li, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/08 (2013.01); G11C 16/102 (2013.01); G11C 16/14 (2013.01); H03K 19/1737 (2013.01);
Abstract

A memory device includes N memory planes (N is an integer greater than 1), M asynchronous multi-plane independent (AMPI) read units (M is an integer smaller than or equal to N), a first microcontroller unit (MCU), and a multiplexing circuit coupled to the N memory planes, the first MCU, and the M AMPI read units. Each AMPI read unit is configured to provide an AMPI read control signal for a respective memory plane to control an AMPI read operation on the respective memory plane. The first MCU is configured to provide a non-AMPI read control signal for each memory plane to control a non-AMPI read operation on each memory plane. The multiplexing circuit is configured to, in a non-AMPI read operation, direct a non-AMPI read control signal to each memory plane from the first MCU, and in an AMPI read operation, direct each AMPI read control signal of M AMPI read control signals to the respective memory plane from the corresponding AMPI read unit.


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