The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Oct. 20, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Yexiao Yu, Hefei, CN;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); G11C 5/06 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/488 (2023.02); G11C 5/063 (2013.01); H01L 21/76816 (2013.01); H01L 21/76843 (2013.01); H01L 21/76862 (2013.01); H01L 23/5283 (2013.01); H01L 23/53266 (2013.01); H10B 12/50 (2023.02);
Abstract

A method for manufacturing a memory includes: providing a substrate having a core region provided with a word line; forming a dielectric layer on the substrate, and etching the dielectric layer to form a first filling hole exposing the word line; forming a barrier layer on a hole wall of the first filling hole, where the barrier layer located in the first filling hole surrounds and forms a first intermediate hole exposing the word line; etching the word line exposed in the first intermediate hole to remove a first residue on the word line; and forming in the first intermediate hole a first wire electrically connected to the word line.


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