The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Sep. 15, 2022
Applicant:

Ampere Computing Llc, Santa Clara, CA (US);

Inventors:

Neerbhee Verma, Vancouver, WA (US);

Gerardo Fernandez, Beaverton, OR (US);

Harb Abdulhamid, Raleigh, NC (US);

Assignee:

Ampere Computing LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 11/27 (2006.01);
U.S. Cl.
CPC ...
G06F 15/7882 (2013.01); G06F 11/27 (2013.01);
Abstract

Disclosed are techniques for external quiesce of a core in a multi-core system. In some aspects, a method for external quiesce of a core in a multi-core system-on-chip (SoC), comprises, at control circuitry for the multi-core SoC, receiving an indication that a core in a multi-core SoC should be quiesced, determining that the core should be externally quiesced, and asserting an external quiesce request input into the core.


Find Patent Forward Citations

Verma, Neerbhee. (2024). External quiesce of a core in a multi-core system (U.S. Patent No. 12093212). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12093212

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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